Your solid state circuit logic is getting poluted by your SDS power source.
1) Check to see that its path to the neutral is as sweet after the power source is changed.
2) Consider putting a ferro-resonant transformer/ ferrite rings around the power going to the solid state trip unit to stop its logic from being tripped out by spurious harmonic wave action.
( Compared to the loads involved, the actual current needed by the sensors is a joke. -- Meaning that feeble peaks in far harmonics that affect it would never cause distress in any other element -- and never get picked up by the EE's in quality control. )
You should put your mind to rest INRE the actual trip settings. Your problems lie entirely within the trip logic -- the actual engineering of the factory is not too willing to hand out -- trade secrets and all.
Suffice it to say that if the power supplied to the logic board is scratchy, if it's poorly grounded vis a vis the SDS, you've got troubles.
The 180 second delay makes one think that its logic is filling up a cap in an RC timing circuit. Time-linked behavior almost always points to digital logic. Nothing else gives you clock-work failure modes -- and no smoke let out.
